Sony SPRESENSE is a low-power microcontroller board well-suited for prototyping applications involving GNSS, cameras, audio, and IoT. Its compact size makes it easy to get started, offering an attractive option for initial ground-based prototyping, payload experiments, algorithm validation, and concept demonstrations using GNSS or cameras.
However, when considering its use as an onboard computer (OBC) for CubeSats or spacecraft, the evaluation criteria differ. Rather than simply comparing CPU specifications, the key question is whether the platform can be integrated into and operated within a spacecraft system.
The SC-OBC Module A1 is designed as a space-grade computer module for small satellites. It features FPGA-based I/O flexibility, redundant memory configurations, FPGA-based memory scrubbing, error detection and correction for FPGA configuration memory via the Xilinx SEM Controller, as well as anomaly detection and system recovery functions, making it a viable candidate for an OBC that becomes part of the mission. Additionally, it supports the Zephyr RTOS, with board support included in the Zephyr upstream. This allows application development using Zephyr’s standard workflow rather than being confined to a proprietary SDK.
The A1 specifications include a Xilinx Artix-7 FPGA, Cortex-M3 / MicroBlaze-V cores, CAN / I2C / UART interfaces, 38-pin FPGA user I/O, dual 32 MB NOR Flash, dual 512 KB FeRAM, and an 8-bit PIC MCU for anomaly detection and system recovery. Unlike SPRESENSE, the A1 does not natively include application-specific functions such as GNSS, camera, or audio processing. For pure payload prototyping or low-cost ground demonstrations, the A1 may be system-oriented and potentially over-specified depending on the use case.
Nevertheless, the A1 is not a space-grade module that is difficult to begin developing with. It includes a Development Board, enabling evaluation, debugging, I/O connectivity, and Zephyr application development before integration into a spacecraft system. The Development Board features an OBC Interface, DEBUG Interface, FPGA JTAG, CPU JTAG, FPGA Console, 8-bit PIC MCU (TRCH) Console, UIO Interface, CAN Interface, SC Bus Interface, main power input, UIO power input, Power LED, User LED, User Switch, and a temperature sensor.
Furthermore, the A1 benefits from assets developed through actual satellite projects. SC-Sat1 / SC-Sat1a is a 3U CubeSat developed to demonstrate the SC-OBC Module A1 in orbit. Although the KAIRUS-3 mission carrying SC-Sat1a did not complete its mission, preventing in-orbit demonstration of the A1, the flight software and mission control software developed for SC-Sat1 / SC-Sat1a are publicly available. These are not mere samples but software and ground-system development assets created for an actual satellite project. Additionally, a sample repository for the A1 is provided, making it easy to start software development on the A1 when used together with the Development Board.
What matters most is not just CPU specifications or ease of prototyping, but the role the component plays within the mission. SPRESENSE may be suitable for ground verification or non-critical experiments. In contrast, an OBC that becomes part of the mission requires design considerations encompassing recoverability, communication interfaces, RTOS support, FPGA-based extensibility, and full system integration. The SC-OBC Module A1 is one option tailored to this domain.